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UID:submissions.supercomputing.org_SC22_sess252_drs105@linklings.com
SUMMARY:Toward Efficient Checkpointing across Deep Tiers of Memory Hierarc
 hy
DESCRIPTION:Doctoral Showcase, Posters\n\nToward Efficient Checkpointing a
 cross Deep Tiers of Memory Hierarchy\n\nMaurya\n\nModern HPC workloads pro
 duce massive amounts of distributed intermediate data that needs to be che
 ckpointed concurrently in real-time at scale. One such popular scenario is
  the use of checkpoint-restore for revisiting previous states (intermediat
 e data) to advance computations, such as adjoint methods. In this context,
  GPUs have shown tremendous performance improvements during computations b
 ut demonstrate I/O limitations while managing high-frequency large-volume 
 data movement across heterogeneous memory tiers. Existing data movement ru
 ntimes are not well suited for such I/O because of factors such as imbalan
 ce in checkpoint distribution across fast memory tiers, slow memory alloca
 tion, and restore oblivious cache eviction and prefetching strategies. We 
 address these challenges by designing a set of transparent, asynchronous c
 heckpoint-restore techniques that minimize the blocking time of the applic
 ation during I/O using three novel contributions. First, we design techniq
 ues to evenly distribute checkpoints across fast memory tiers (e.g. peer G
 PUs) using collaborative checkpointing that leverages fast interconnects s
 uch as NVLinks and NVSwitches for load balancing. Second, we mitigate the 
 slow cache allocation for storing checkpoints on both GPU and host by leve
 raging techniques such as CUDA's virtual memory management functions, eage
 r memory mapping, and lazy pinning. Third, we design a restore-order aware
  eviction and prefetching approach that is coordinated by a finite state m
 achine based on a unified checkpoint-restore abstraction for optimal evict
 ions. Our evaluations across real-world and synthetic benchmarks demonstra
 te significant speedup in both checkpoint and restore phases of the applic
 ation compared to the current state-of-the-art data movement engines.\n\nS
 ession Format: Recorded\n\nRegistration Category: Tech Program Reg Pass
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