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DTSTART:19700308T020000
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BEGIN:VEVENT
DTSTAMP:20230124T171524Z
LOCATION:C141
DTSTART;TZID=America/Chicago:20221113T143000
DTEND;TZID=America/Chicago:20221113T150000
UID:submissions.supercomputing.org_SC22_sess421_ws_drbsd101@linklings.com
SUMMARY:Evaluating Nonuniform Reduction in HIP and SYCL on GPUs
DESCRIPTION:Workshop\n\nEvaluating Nonuniform Reduction in HIP and SYCL on
  GPUs\n\nJin, Vetter\n\nMotivated by maturing programming models and porta
 bility for heterogeneous computing, we describe the challenges posed by ha
 rdware architectures and programming models when migrating an optimized im
 plementation of nonuniform reduction from CUDA to HIP and SYCL. We explain
  the migration experience, evaluate the performance of the reduction on GP
 U-based computing platforms, and provide feedback on improving portability
  for the development of the SYCL programming model.\n\nSession Format: Rec
 orded\n\nRegistration Category: Workshop Reg Pass
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