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DTSTART:19700308T020000
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DTSTAMP:20230124T171527Z
LOCATION:C143-149
DTSTART;TZID=America/Chicago:20221114T115000
DTEND;TZID=America/Chicago:20221114T115500
UID:submissions.supercomputing.org_SC22_sess439_ws_scsc108@linklings.com
SUMMARY:CXL, PMEM, and Checkpointing – The Path Forward
DESCRIPTION:Workshop\n\nCXL, PMEM, and Checkpointing – The Path Forward\n\
 nKeville, Chen\n\nWe present nascent work that introduces a path forward f
 or leveraging CXL 2.0 and 3.0 subprotocols, notably the CXL.cache and CXL.
 mem subprotocols, in a novel fashion. We intend to demonstrate CXL Type 1 
 and Type 2 device functionality in order to make a strong case for more an
 d larger cache levels. This will not only create a novel memory hierarchy 
 for us to accelerate precomputed (speculated) memory paths but will effect
 ively operate as a live checkpoint and snapshot option since we are moving
  many traditional RAM operations onto redefined non-volatile media, initia
 lly CXL-enabled NVMe drives.\n\nSession Format: Recorded\n\nTag: Reliabili
 ty and Resiliency\n\nRegistration Category: Workshop Reg Pass
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